The present invention relates to a digital-analog converter capable of achieving high accuracy with a few elements and suitable for use in an MOS integrated circuit.
In digital audio devices, for example, various methods have been proposed to demodulate audio signals using a high accuracy digital-analog converter (which will be hereinafter referred to as D/A converter). This conventional D/A converter can be formed in different ways. In the case of a D/A converter in which a single resistor array consists of a plurality of resistors connected in a string, switched over by a single switch array, however, a large number of elements are needed to achieve high accuracy. When the D/A converter having such a arrangement is intended to convert digital signals, each having 14 bits, to analog signals, the number of resistor elements needed reaches about 16,000. Even when MOS-FET technology is considered, this D/A converter can not be realized because its chip size becomes extremely large.
U.S. Pat. No. 4,338,591, for example, discloses a D/A converter wherein a converter comprises a circuit for converting a group of upper bits and a group of lower bits, and an analog output obtained from the upper bits provides upper and lower limit voltages to apply to switch arrays for producing into analog data, and wherein an analog signal is obtained which is a voltage determined by the lower bits and ranging from the lower limit voltage to the upper limit voltage.
FIG. 1 is a block diagram showing an example of this type of D/A converter. Numeral 1 represents a series resistor array consisting of a plurality of resistors connected in a string and intending to divide constant voltages Ref.sup.+ and Ref.sup.- applied to both ends of said array. Numeral 2 denotes a first switch array for selecting two divided voltages of said series resistor array responsive to the group of upper bits U of a digital signal and for applying them to two buffer amplifier 3. Output voltages of said buffer amplifiers 3 are applied to a second switch array 4, and an output voltage V OUT is obtained through a group of ladder type resistors 5 each being of R-2R type, responsive to the group of lower bits L of the digital signal applied to the second switch array 4.
Since said series resistor circuit 1 and said ladder type R-2R resistor group 5 are different in structure, the conversion characteristics of the D/A converter are deteriorated when an analog output is obtained from each of the upper and lower bits of the digital signal even if the resistor of the series resistor circuit 1 and ladder type R-2R resistors group 5 are made equally precise. Hence, it would be extremely difficult to manufacture the D/A converter in the form of a monolithic integrated circuit. The same is true even when the accuracy of resistor values is similarly controlled in said both circuits. Further, the ladder type R-2R resistors of group 5 are connected to the switch array 4 to which the group of lower bits L of the digital signal are applied. To achieve high accuracy by means of this ladder type resistors group 5, the resistor elements located particularly on the side of the upper bits must be trimmed to have correct values, thus making the cost high. Furthermore, this type of D/A converter is arranged so that output voltages of said buffer 3 are applied to the ladder type resistors group 5 through the second switch array 4. Therefore, error occurs in voltages supplied to the ladder type resistors group 5 because of the irregularity of resistor when the second switch array 4 is under operation. This makes it impossible to achieve high accuracy.